Hi,
Won't
all available EEPROM locations be written (ie refreshed), as a 'page', whenever a single byte is updated?
................
I was thinking of using battery-backed I²C RAM instead - in the form of an DS1307/DS3231 RTC module...
(The DS1307 has 56 such bytes, but the DS3231 seems to only have 7 (still investigating...
)
No, as IWP indicates, it is normally External Serial (I2C) EEPROM devices which are organised with "pages" of 16 or 64 bytes, where "careless" programming could cause a chip to wear out up to 64 times faster than expected.
Does the DS3231 have
any User RAM ? AFAIK the "User Buffer" is only a "pipeline" for the (7) time registers, to ensure that the register values don't update (overflow and carry to the next byte) whilst they are being read via the Bus. I have wondered if the (8) "Alarm" registers could be used as a small NV scratchpad, but can they store a full byte, or only in BCD format, or similar? There does appear to be the one byte allocated for "Aging Offset" ($10), which could be used for any (other) "User function".
The DS323
2 does have additional NVRAM but these "bare" chips seem to carry a large price premium; maybe the reason why I've never seen a RTC module or breakout board using them. A significant number of DS3231 modules
do include a separate I2C serial EEPROM, but that takes us back to the "wear out" issue. However, these EEPROMs can be so large that "levelling" the wear over the whole chip might easily solve the problem. Personally, when I needed some "RAM", I used a Microchip MCP7940N RTC chip which has additional SRAM, but like the DS1307, it requires an external crystal, etc., so lacks much of the convenience (and probably accuracy) of the lovely little "DS3231 for Pi" and similar modules.
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But back to the OP's question. Probably the first thing to do is to ensure that byte(s) is/are only rewritten when they
need to be changed, i.e. perform a Read before (every) Write. Also you can ignore "wear out" if bytes are to be written less frequently than an average of (say) every hour over the full life of the application. Thus, is it
necessary to write the data more frequently than every hour, or could it be "buffered" in RAM, with the risk that up to an hour's data might be lost? Of course some may be lost anyway if power is missing for a significant time.
If you "spread" the data throughout the EEPROM to "level" the wear, then you need a "pointer" to where the last data was stored, but must ensure that the pointer location itself doesn't wear out! Maybe you count (in RAM) up to (say) 1000 writes and then update the EEPROM area / pointer, and/or each time power is applied? Alternatively, organise the EEPROM as a "Circular Buffer", incrementing the (RAM) address pointer at every (block) write, and maintain a unique "Start/End Of Buffer" pattern of bytes in the EEPROM, which can be searched-for when power is re-applied.
An alternative method is "Power Fail" detection ; A PICaxe can run on such a low current that a supply decoupling capacitor can keep it running for long enough to store any "current status" data. The majority of PIC(axe)s have sufficient on-chip hardware (Voltage Reference, Comparator, etc.) to generate an "interrupt" with little on no external hardware (maybe a pin and diode, or a couple of resistors).
Cheers, Alan.