28X1 - interrupts on input pins.?

[Craftybytes]

What i/o pins on the 28X1 chip support 'interrupts'..?

Looked at the Manual - could not find where this is referenced..!

Also - if I run the 28X1 using a 16Mhz crystal - what would be the MIPS throughput..?

In my project I need at least 5 x inputs with 3 supporting 'interrupt on falling edge' conditions..

Any help appreciated..

crafty.
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[BCJKiwi]

1. Inputs 0 thru 7
2. Section 2, page 149 and following - setint, and Manual 2, page 152 - setintflags
3. As this is a basic interpreter system, MIPS is rather difficult to relate to the cycle time of any particular program - specially when using interrupts.
4a. 5 inputs no problem (8 on the 28X1), All 8 could be sampled for a condition combination.
4b. Interrupts work on the change of state of the port from on to off (high/low, 1/0). I guess the transition from on to off could be considered a 'trailing' edge.

 

[Craftybytes]

Thanks for that..!!

You know - I looked thru all 3 sections of the Manual previously and couldn' find the info - but now with your pointers - stands out like the proverbial..DOH..

As for the MIPS - well the 3 i/p's with 'interrupts' will be monitoring a set of switches which will most probably have a minimum "active" time of around 250 msecs (at least) - more like 1/2 - to - 1 secs - user pushes button (switch) - so the active 'interrupt' will be very easily processed well within the time window of the switch being pushed..

Much appreciated..

crafty.
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[westaust55]

BCJKiwi has already given you a good lead to the interrupt capbilities.

With respect to your comment:

3 supporting 'interrupt on falling edge' conditions

Be aware that in setting up interrupts for multiple inputs that the conditions for ALL three inputs must be simultaneously achieved (though not necessarily all occurring at the same instant) before the interrupt condition is recognized and handles.

In other words you must treat the conditions for all pins involved as being AND’ed together for an interrupt action to occur.

While I believe that it would have been far more useful had the interrupt function used an OR’ing of the active pins so that any pin changing to the “trigger” state caused and interrupt, AND’ing is what Rev.Ed. has provided.

Hope that the above is clear enough

 

[inglewoodpete]

Crafty, You're using an X1 part so you can use the NOT parameter to set the interrupt mask. Sort of negative logic (it works but you can understand it better when you stand on your head). I have used the NOT successfully when configuring interrupts on a 40X1.

 

[Craftybytes]

Thanks all..
westaust55 - yep am aware - am thinking of maybe doing an external latch of the interrupt i/p's with the 'latch clock' as the actual 'interrupt' i/p to the 28X1 - the 'interrupt' code then can read the latch o/p's either in parallel or in serial (YTBD) to determine what pins went low, etc..
inglewoodpete - thanks for that info..

crafty.
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[westaust55]

Crafty,

Along the line that you are contemplating . . .

A Microchip MCP23008 8-bit IO expander thatwill connect via the i2c bus of your 28X1. It provides an Interupt pin/signal to the PICAXE.

You define which inputs are Interrupt enabled and the interupt is generated if any of the defined inputs has a change of state (not direction sensitive).