Shared Clock

[Phil bee]

Just a quick question, can 3 picaxe chips be run from the same oscilator.

 

[hippy]

Potentially yes, but the question would be to what end or gain, and exactly what do you mean by "same oscillator" ?

 

[Phil bee]

The idea is to have 3 chips running from a single system clock so that they can be syncronised, so if they all run the same program they would all arrive at the end of the task together.

Phil.

 

[srnet]

You would have problems getting the 3 chips running exactly synchronized, since they will initially start at slightly different times due to variances in the internal power on reset delay.

So it really depends on what you mean by 'together'

As ever some indication of the application would mean you get far better answers to the initial question.

 

[Buzby]

.... they will initially start at slightly different times due to variances in the internal power on reset delay.
.... As ever some indication of the application would mean you get far better answers to the initial question.

Quite true. Even with the same clock applied to 3 chips, each will start at slightly different times due to the internal oscilator being used for the startup.

Even if you have a trigger signal on an input pin to start your code running, you can't be sure what the PICAXE firmware is doing in the background.

More details please.

 

[jims]

Phil...what if the clock chip broadcasts an interrupt to each of the 3 chips, and each of the 3 chips begins it's program only when it receives that interrupt from the clock? (they sit there waiting for the clock interrupt before starting).That way the thing that determines when each chip starts will be receipt of the same clock interrupt; and any difference in their program end time should only be due to run time differences from one chip to the next.

The idea is to have 3 chips running from a single system clock so that they can be syncronised, so if they all run the same program they would all arrive at the end of the task together.

Phil.

 

[MartinM57]

Still depends on what " they would all arrive at the end of the task together" means - same CPU cycle, same firmware instruction, same PICAXE line of code, same signal put on an output pin at "exactly" the same time...
...but hey, lack of requirements never stops the forum collective proposing solutions

...I think multiple chips detecting the incoming interrupt (since most (all?) PICAXE interrupts are polled between lines of PICAXE code), at "exactly" the same time is unlikely

 

[geoff07]

So if they are all doing exactly the same thing at the same time why use three? It would be impossible to detect the difference between three chips and a single chip with a fan-out of three.

If it is for reliability, then the shared clock will kill that. If it is for remote synchronicity, then how would you share the clock without propagation delay?

It would be interesting to know the real cause of this need!

 

[Ravenous]

what if the clock chip broadcasts an interrupt to each of the 3 chips, and each of the 3 chips begins it's program only when it receives that interrupt from the clock?

Are you trying to make some sort of triply redundant system by any chance? I think each chip could set a pin high on reaching a certain stage, then read two input pins to see if its sisters have reached the same stage.

But it depends what you're trying to do and how close together (in milliseconds) you need them to be.

Will your planned code have branches, for example, which will cause slight differences betwen the three computers?

 

[Phil bee]

Thanks for all the replies.

It just shows the the willingness of members to try to help out.

the idea was to use three 08m2 chips to control a bank of RGB leds and all running the same code at the same time, but I don't need to use 3 chips as I cant get 3 PWM outputs from the same 14m2 and still have enough inputs for both remote or manual control of the led colour.

Phil

 

[geoff07]

I think that for that kind of application, a shared clock might be going a bit far, but if you were to need it, then a simple synchronisation signal generated by one chip and observed by the others might be more practical. That way you could use the smaller chips - only the 28 and 40 pin picaxes have access to the resonator pins anyway.

 

[srnet]

Thanks for all the replies.
It just shows the the willingness of members to try to help out.

Indeed.

But think how much better, and shorter, the replies would have been if you had revealed in the first post what exactly it was you were trying to do ?