Hidden X40 VDD tricks?

A

alband

Senior Member
I don't know if this is widely known, and whether it applies to the GND pin and other chips;
but the internal power pins of the X40 are connected.
I have been spending a LONG time trying to find a short circuit in my power lines and in doing so (well, still haven't found the SC but I getting close) I discovered that the power pins of the 40X are internally connected. In front of me right now, I can test with the multimeter and it gives 0ohms between the two pins. I'm using a breadboard and one of the two pins isn't connected to anything, so they aren't connected by the rest of the circuitry.

Not sure if this is well known or not, or whether it is a fault in my chip (it still behaves fine).

Anyway, I'm of to sniff out that dmn short circuit.
 
D

Dippy

Moderator
yeah, happens all over the place. Sorry you haven't made a discovery ;)
But for goodness sake don't use that for carrying current.
These internal conenctions are used on many chips; sometimes for convenience and sometimes for electrical reasons. Many reasons, I'm sure someone can elaborate after looking it up.

So, don't use this 'property' as a ground 'link' as it could end in tears, though will increase the profits of vendors very nicely.
 
B

BeanieBots

Moderator
Indeed, no new discovery.
Often done for heat dissipation reasons as well as convienience.
Silicon does not conduct heat very well and to prevent local heat issues, copper is laid down to conduct it away but copper also conducts electrically.

All should be connected to the relevant power lines.

Chips with mixed analogue/digital technology often have seperate 0v lines to prevent noise but these are not normally connected internally. Might have been the original intention but was found to be too complex in the final artwork. Designing a chip is similar to designing a PCB except each extra layer can cost an extra £1m in design plus an extra trip through the implanter & etcher during manufacture. Becomes a business vs spec issue.
 
hippy

hippy

Ex-Staff (retired)
For chips with multiple VDD (+V) and/or multiple VSS (GND/0V) legs it is always recommended to connect all those legs as indicated.

It is rare that multiple VDD or VSS are entirely isolated from each other ( except perhaps where there may be a 'digital ground' plus an 'analogue ground' and they will usually be named differently ).

Hearing from an actual chip designer, I've learned multiple VDD and VSS legs are usually there for a good reason, including to handle current loads within the chip ( particularly I/O circuitry ) and, without all such legs connected, current can become too high for the internal paths leading to heating, failure or faulty operation and so on.
 
E

eclectic

Moderator
Riccardo.
Yes, make connections to all the pins.
Look at the diagram on page 2. (Left hand side)
It show the connections.

e
 
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