Confused by datasheet

A

Andrew Cowan

Senior Member
I am looking at the pinout of a 5V voltage regulator on the datasheet for the mcp1824t-0802e/ot. That regulator is great, as it has very low dropout. The legs are:

1)Vin
2)GND
3)SHDN
4)PWRGD
5)Vout

I have never come across SHRN and PWRGD before. In the typical applications section, SHRN seems to be an on off control - I can cope with this. PWRGD (I assume Power Good) is connected to Vout via a 100K resistor - what does this do?

Thanks,

Andrew

Edit:

From the datasheet:

3.5 Power Good Output (PWRGD) For fixed applications, the PWRGD output is an opendrain output used to indicate when the LDO output voltage is within 92% (typically) of its nominal regulation value. The PWRGD threshold has a typical hysteresis value of 2% The PWRGD output is delayed by 110 μs (typical) from the time the LDO output is within 92% + 3% (maximum hysteresis) of the regulated output value on power-up. This delay time is internally fixed.

I still don't understand!
 
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B

BeanieBots

Moderator
The text you have quoted is almost exactly as I would have explained it.
Not sure what you don't understand.
SHDN is "Shutdown". It is used as you guessed to "turn it on/off"
PWRGD is an indicator that the output is within spec. You could have the PICAXE monitor that pin to see if the output has dropped due to overload or if the input is not high enough.
 
D

Dippy

Moderator
I would have thought Figure 2-33 was good clue as to it's main job??
i.e. indicate that the output has reached 92% of the specified regulated o/put.
i.e. I'm ready!

Maybe it can also idicate if the o/p hs drooped due to load?
Try it.

Remember, these things are designed to be used in other sections of a circuit, not just as your one-and-only main regulator. You may wish your main device to switch on a sub-circuit and let the main part know everything is OK.
I'm sure you can think up some other scenarios?

PS. Snap! (Nearly)
 
B

BCJKiwi

Senior Member
The pin changes state to high once power is above 92% of the set point.

So if you have a voltage sensitive circuit you could use this info to delay startup until the voltage has stabilised at the right level, or to shutdown/set a warning to indicate the circuit is out of spec.
 
W

westaust55

Moderator
3.5 Power Good Output (PWRGD)
For fixed applications, the PWRGD output is an open drain output used to indicate when the LDO output voltage is within 92% (typically) of its nominal regulation value. The PWRGD threshold has a typical hysteresis value of 2%. The PWRGD output is delayed by 110 μs (typical) from the time the LDO output is within 92% + 3% (maximum hysteresis) of the regulated output value on power-up. This delay time is internally fixed.

The power good output is an open-drain output that can be pulled up to any voltage that is equal to or less than the LDO input voltage. This output is capable of sinking 1.2 mA minimum (VPWRGD < 0.4V maximum).


output is open drain hence the resistor

EDIT:
Did not see any reference to 110 kohm but in the datasheet these 100 kohm and 10 kohm examples


and from wiki:
"The word "drain" in the term "Open-drain" refers to the drain terminal of a MOSFET transistor. (The analogous term for BJT devices is open collector.) Open-drain outputs can be useful for analog weighting, summing, limiting, etc., but we will discuss applications in digital logic only. An open drain terminal is connected to ground in the low voltage (logic 0) state, but has high impedance in the logic 1 state. This prohibits current flow, but as a result, such a device requires an external pull-up resistor which is also connected to the positive voltage rail. Note that in newer microelectronic circuits/devices which utilize open drain (such as microcontrollers), there may be a 'weak' internal pull-up resistor to accomplish the task of connecting the terminal in question to an internal positive voltage source/rail; that source typically being the VCC of the device.

When a device is in the high-impedance state, the pull-up resistor keeps the line at logic 1. The line stays there until the device goes into the logic 0 state, and begins to sink current. This current flow creates a voltage drop across the pull-up resistor, and the line drops to the logic 0 voltage.

One useful property is that the external pull-up resistor need not be connected to the same voltage as the chip supply voltage Vcc: a lower or higher voltage can be used instead. Open drain circuits are therefore sometimes used to interface two series of devices that have different operating logic levels (voltages).

Another advantage is that more than one open-drain output can be attached to a single wire. If all outputs attached to the wire are in the high-impedance/logic 1 state, the pull-up resistor will hold the wire in a high voltage state. If at least one of the device outputs is in the ground/logic 0 state, it will sink current and bring the line voltage low. "
 
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Dippy

Moderator
In one sentence:-
The resistor holds it up lightly and when the open-drain is triggered it sucks it down, giving you an on-off which you can sense with logic.

A fairly long sentence I admit :). Suggest you read the above posts and get a little book on basic elecronics. cf. the resistors on the I2C bus, haven't you wondered why they are there?
 
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