20x2 reset versus power up detect

humphpicaxe

New Member
Dear All,

Tried to use code similar to the snippet for 18x to detect whether a reset was due to reset or power down. The equivalent bit to the one described for the 18x is POR in register RCON, ie bit 1 of FD0h. However, contrary to picaxe 20x2/ microchip's 18F1XK22 spec sheet, that bit does not go to zero after a power down. I looked through the registers to find something that does change from assigned state to 0 after a power down, and found register T3CON. If you are not controlling timer 3 you can write ones to this register which are only set to zeroes after a power down. Thus, the code equivalent to the 18x is:

peeksfr $B1,b0 ' this location is called T3CON, and is 0 at powerup, unchanged after reset
if b0=1 then goto codeafterreset
codeafterpowerup:
sertxd (#b0,10,13)
pokesfr $B1,1
'insert other code afterpowerup here
codeafterreset:
 

hippy

Ex-Staff (retired)
Unfortunately 'not resetting T3CON' was identified as a flaw which caused inconvenience for some people using timer 3 so has been rectified and this will probably not work with future versions of the firmware.

If does seem that it's also possible to "PokeSfr $D6,1" (TMR0L) which will be zeroed by power-on but not by a "Reset" start. Not sure if that's unintentional, works under all situations, or if there are any other SFR which can be set and not cleared by "Reset".
 
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