Do Rev-Ed provide any documentation for PICAXE VSM describing which BASIC commands are not supported and which chip features are not simulated?

[Flenser]

I've just tried to test my first program for the 20X2 in PICAXE VSM and immediately got the following two errors:

• tmr3setup command not supported
• Background 'hserin' receive cannot currently be simulated!

Do Rev-Ed provide any documentation for PICAXE VSM describing which BASIC commands are not supported and which chip features are not simulated?

I searched the picaxe.com web site, the PICAXE VSM installation directories and the PICAXE VSM Help but I did not find anything.

 

[Technical]

I'm not sure such a list has been published, probably mainly because no-one has asked before! PICAXE VSM does very well to fully emulate the vast majority of projects, however there will always be a few technical limitations of what the simulator engine can emulate, particularly with off-processor dedicated silicon modules in the real chip (such as the background hserin). As you have found the emulation will list any commands not supported via error reports at compilation.

 

[system11]

I found the pullup command is missing, it would be nice if that could be implemented sometime. For now I've worked around it adding externals but it's quite a few needless components.

 

[roho]

I have a problem with a mixed-signal simulation getting stuck. These code excerpts are from a 14M2 programme, though I'm fairly sure that all PICAXEs are affected.

First off, the definitions:

; Define the special function registers.
SYMBOL TMR1H_REG   = 0x17
SYMBOL T1CON_REG   = 0x18

; Register T1CON bit definitions.
SYMBOL TMR1ON_BIT   = bit0

SYMBOL TMR1HThreshold = b3

Compilation is fine, but the execution does not progress beyond this DO loop.

  ; Comment out this DO loop when running the MS simulation.
  DO
    PEEKSFR TMR1H_REG, b0
  LOOP UNTIL b0 > TMR1HThreshold

This works fine in the chip, but the simulation gets stuck because b0 is always 0. Would it be possible to modify the PICAXE model(s) so that the TMR1H register behaves as per the silicon?