New: true two-wire power+data network

Dear Forum members,

After more than a year of on-and-off work I am now able to present a complete specification as well as a tested implementation of a true two-wire combined power/data network of PICAXE nodes (one master, one or more slaves) that supports bi-directional communications between processes distributed over any number of nodes.

I would like to submit it now to the Forum for a thorough review/discussion for two reasons:

- The discussions on this forum have contributed greatly to the development of the network
- The resulting documentation and implementation may provide some value in return to many PICAXE users.

The network concept has the following characteristics:

- Power and data are distributed over just two wires that are interchangeable; furthermore, only the master node needs a power source,
- All nodes are similar in that they catch all network messages and process them in a equal fashion,
- The network can be realized (and has been successfully tested !) in a practical in-house setting spanning several tenths of meters,
- The protocol is efficient in that it allows small microcontrollers (PICAXE-08M) to implement both functional behavior as well as a full-fledged network stack (a compete network stack on the 08M requires only 94 bytes out of 256)

I have put great effort in creating proper documentation; I hope some forum members are willing to review it (and perhaps even test it by building their own implementation). Reactions are most welcome.

A successful test has been performed for an in-house network between two nodes 20 meters apart. Of course eventually a more thorough test is needed.

In my opinion the network concept is a proper demonstration of the power of the PICAXE concept.

All information is available via the following link:

http://www.kranenborg.org/ee/picaxe/twowirenetwork.htm

Best regards
Jurjen Kranenborg
http://www.kranenborg.org/jurjen

Edited by - kranenborg on 19/10/2006 21:54:45

you're sick man!
this thing is like awsome i can see the work put into this... amayzing
i will most certainly put this thing into good use.
only prob is that this master H-bride is hard to get probably...

PS it kinda resembles lego RCX system, they had a similar consept- power and signal from the same line + those cute 4 diodes

thanks again.

(PS by sick i mean genious)

Amazing! I don't have an application for this right now, but I will certainly keep it in mind.

Two things:
1. I think you mean "a few tens of meters", rather than "tenths".
2. On the sending side, could you use logic-level MOSFETs (IRLxxxx) to simplify the circuit at all?

Thanks again for sharing this.

Mike

Excellent stuff, and I've only really skimmed through it.

The only thing I can say at the moement, having opened the PDF thinking, "how has he done this ?", is that a brief explanation of the bus hardware might be better given as an overview earlier on. A diagram which showed current flow through the signal paths in each state would make its operation clearer.

Also, what's the maximum current which the system can support over the bus ?

[Added] And on that point, could the MOSFET tri-stating push-pull drive be replaced by an L293D 'motor' driver ? With all four channels paralleled in that chip, it could give 2.4A ( 4.8A peak ) capability.

Edited by - hippy on 20/10/2006 02:07:10

I certainly like the overall concept but I wonder why you chose a full bridge rectifier for the slave network connection. This is only required if arbitrary polarity for the slave connections is important. That might make sense for a LEGO like system where random orientation of the blocks is desirable but if a polarized jack is used for the connection then the bridge rectifier can be eliminated with considerable saving in parts count and voltage drop.

wilf

Edited by - wilf_nv on 20/10/2006 06:42:53

Edited by - wilf_nv on 20/10/2006 06:44:00

<A href='http://www.user.dccnet.com/wrigter/serialpowermasterslave.gif' Target=_Blank>External Web Link</a>

shows some suggestions to simplify the basic master and slave circuits. The drive circuit of the logic FET halfbridge is designed for a picaxe with a tristate output which saves one pin.

The 0V, 5V or hiZ output levels of the serial output pin appear noninverted at the halfbridge output.

The halfbridge is free of any &quot;shoot through&quot;
current.

The halfbridge sources 5V up to 1A safely limited by the 7805 regulator.

The halfbridge output can therefore source 1A but only needs to sink the R4 pullup current.

The slave uses one Schottky diode D1 for power and a second Schottky diode D2 for clamping the serial input voltage. This has several advantages over the voltage divider circuit including reduced power and proportional logic levels.

wilf

An impressive development Jurjen. I &quot;skimmed&quot; through the PDF and it looks thorough. Have you included typical and maximum current usages? Like hippy, I eagerly searched the PDF searching for curcuit diagrams to explain the working concept.

Clearly you have put a lot of time and effort into the concept, design and documentation.

Hello,

I am very thankful for the responses up to now. It was a good decision to publish it in this stage, as it is clear to me that some things need to be improved, added, or reformulated.

Only a short reponse will follow now during lucnhtime, in the weekend hopefully more.

@Bloody-orc:
Indeed the whole idea started with the LEGO RCX module. Note that it is not supported anymore and just recently replaced with a digital network (LEGO NXT) that requires ... 4 wires! So I am glad I managed digitally as well with just two ...

@mikek:
For the moment I do not think the IRLxxxx will make the circuit simpler, but I'll come back to this later

@hippy:
You're right on the documentation matter, and I will take up your point, probably by adding a section in the beginning that gives an overview of how the network works physically, maybe add a few diagrams too. I realize now that the writing style is more like an architecture spec; (most of) the details are there and placed in a sequence of viewpoints, but that might not always be the best method for an introduction. However all details matter, and by using proper abstraction levels I have managed to keep the network stack surprisingly small.

I do have the ambition to specify a complete architecture in the end, as it helps to completely understand the subject (as well as develop applications), and that has been my goal from the beginning

Considering the L293D suggestion, I have thought of this option, but initially rejected it because the output voltage drop is quite high (1.4-1.8V) which means that the network voltage would be quite low. I wanted to use a master node Vcc of 5V (I actually used a 4.5V battery for the test shown in the pictures). However I realise now - based on your suggestion - that for many applications that use a 9V wall transformer it is no big deal to have both 5V and 6V Vcc lines, the latter could be fed to pin 10 of the L293D, leaving a sufficient network voltage of around 4.5V. So we may look for an alternative circuit diagram now ... (any volunteers?)

@wilf_nv
I fully agree with you that the non-polarized option is a bit overkill in most situations (and the polarity of a running network can be very easily detected): So I gladly accept your proposal for the slave node. There are some applications that still would benefit from using the original, though. I have some more questions on the master node circuit you propose, I'll come back to that later ...

Best regards
Jurjen
http://www.kranenborg.org/ee/picaxe

It's never easy getting documentation perfect and especially where readers have a range of abilities, and I can appeciate the effort already gone into it, where just a simple concept can run into pages of explanation.

I think there are two ways to look at it; most readers either want to be led through how it works, starting with the general idea with more detail being added, or want the complete design up-front which they can build and see work, and then come back and understand in detail why and how it works. This applies to all projects.

I hate to be the one putting more work on you plate and the best approach may be to take on board the changes, make the changes you think are necessary now, then put it to one side to come back to later. If documentation becomes a drag, then just leave it with what you have.

On the bridge rectifier in the receivers; a simple note saying it could be left out if polarity is ensured should be enough ( plus a note about voltages ).

Hi hippy,

Thank you for your kind words. I have actually used about the same approach so far, taking up matters when I liked to, leaving them for a while in other times, allowing some time for contemplation. I do not feel obliged to take up anything, but the points made up to know make sense and probably deserve inclusion in some form between now and never ... Additionally, this thread itself I consider part of the documentation. So, please continue with ideas and suggestions.

A half-serious one (but serious for testing?)for someone to take up: a (maybe context-sensitive) christmas tree lighting system based on this network concept; would be a good testing possibility for determining the maximum power transport capability

Regards
Jurjen

Hello,

The circuit as suggested by wilf_nv (polarized connection) can be simplified even further, and after testing it I have updated the document to version 1.1 to include it (Section 6.2)

Best regards
Jurjen

Excellent Jurjen,
I'll read it all a bit later.
Thinking,,,,wireless version ~;o)

Michael how are you going to send power via wireless?

Microwave Bloody, it'll double as an insect
zapper as well.
Sorry just teasing !

Actually reading about the master, slave and
nodes etc, I was thinking it may have uses
as a wireless network setup also.
(not the powerering section though, just comms)

I only briefly read some of the notes I'll
have a closer look later on.

This kicks ass on SO many levels. Thanks!!!!

Hello,

Some remarks related to previous questions:

* replacement possibilities of EL7232 inverting line driver in master node:

Although this device seems like shaped for this application, most similar easier-to-obtain line drivers do not have the 3-state option, and thus some logic between the PICAXE and the line driver is needed to be able to 3-state the totem-pole MosFET combination.

This can be done by placing a logic circuit based on three NANDS (74HCT00, 74LS00) between the picaxe and the inverting mosfet driver (i.e. the replacememt part for the EL7232)

Given the following definitions:
* Ie: picaxe 3-state indicator output (active low)
* Is: picaxe serial output pin
* Up: input to mosfet inverting line driver for P-gate mosfet (T1, upper)
* Un: input to mosfet inverting line driver for N-gate mosfet (T2, lower)

Then the following relationships should hold:

Up = NOT( NAND(Ie,Is) ) = NAND( NAND(Ie,Is), NAND(Ie,Is) )
Un = NAND( Ie,NAND(Ie,Is) )

Note that since NAND(Ie,Is) is used in both expressions, only three gates in the 74HCT00/LS00 need to be used

There are several inverting mosfet or line drivers around, for example a MAX626 would be excellent. Be aware though to select a type that has a minimum Vcc of 4.5V

* Maximum power supply over the network

Although I do not see any problem in transferring several amps over the network, a power transfer lerger than average will occur in the following cases:

1) Re-powering after slave node message transfer (instance G in Figure 3)
2) Sudden load increase in one or more slave nodes
3) Network power-up at the beginning

The effects of 1) and 2) can be minimized by choosing proper values for the local slave backup caps, but larger local caps maximize power transfer for 3), as in the latter case all caps are discharged and thus a large inrush current is generated.

To me it seems most important to have a low-impedance power source, which means for battery powered systems a large capacitor at the master node ...

Still I think the system should be able to support any kind of power transfer as long as:
* any sudden power demand change during operation is not too strong
* each node has a proper local capacitor; not too small, but not too large either
* the master node power source is strong enough

Best regards,
Jurjen

Every simple solution has limited applications beyond which complexity rapidly increases.

For me this 2 wire system will be ideal for applications with a nominal network current of 1A per network or for more complex and higher power topologies of 1A per network branch.

For higher power networks I would use a modular approach by adding an external high power network driver module to the network master. At some power level, a distributed power or a 3 wire system more ecconomical.

For a pure 2 wire system I would recommend that slaves can be equipped with inrush current limiting especially for charging large caps of &quot;high power&quot; slaves at power up. This slave current limiting can be also be used to automatically isolate a &quot;faulted&quot; slave that might otherwise take down the whole network.

wilf

Concering the previous message: I have considered a controlled inrush current limiting facility on each slave node when I was thinking of a &quot;plug and play&quot; type of node.

A mosfet could be used as a switch in the power line to the main load of the slave node, this switch could be directly controlled by the node's picaxe:

- either directly through a resistor to the mosfet's gate, but with the gate grounded via a capacitor (i.e. a RC filter bewteen the picaxe output and the mosfet's gate) . This would gradually open up the load's vcc line, and therefore limit the inrush current as well as the voltage drop on the network
- or use the pwm output to control the mosfet, giving it a flexible, programmable inrush current limiter.

Note that it is also possible to have a separate process for charging of large loads; I could imagine a special process (activated by the master) that allows a heavy-load node to charge some time, while the same process would temporarily disable interrupts on other nodes (and they would thus ignore the network puls due to loading). This process should be implemented on all slave nodes. Just an idea, dont know whether it really works

@wilf_nv
Concerning your circuit proposal for the master node: I have a question (because I have limited knowledge of bipolar transistors):

- If the picaxe(08m) output is 3-stated (by making it an input), does this mean that both bipolar transistors are closed as well, or is the upper PNP transistor opened by a 0.7V voltage equal to the base-emitter voltage of the NPN voltage? If the latter is the case the circuit appears to me to work, but in the first case it would not as the gates of the mosfets would float ...
Another problem might still be that the CE voltage drop over the bipolars is too large to give a sufficient HIGH gate level to completely open the mosfets ...

A practical tip for testing: if on the master node a LED in series with the pull-up resistor is placed, it is lit each time a message is transferred. If a master node message is sent the LED lights up shortly, if a slave node message follows directly afterwards its is consequently lit for a longer time. Thus a very practical indicator of the network activitiy is present. As the voltage drop over a led is considerable (1.8-2V) it should probably not remain in the final implementation.

Regards,
Jurjen
http://www.kranenborg.org/jurjen



Edited by - kranenborg on 22/10/2006 21:29:26

Hi Jurjen,

I like the modular approach of separating the low power slave supply from the high power load supply.

The inrush current discussion would apply to this case of a high load current supply.

I think a mosfet in series with the load supply with an RC controlled gate voltage would be the simplest method to tailor the load supply inrush current. The mosfet should be a P-ch logic type mosfet with a suitable low on resistance.

Alternatively the &quot;soft start&quot; process of the controlling slave, which you proposed, can pulse the mosfet gate to control its on time so that load supply charging current occurs only for a fraction of the time that the master p-ch mosfet is on. This isolates the heavy load supply from the network when slaves transmit, permits slave power supplies to charge and acts as a circuit breaker if the load supply is faulted.

<i>Concerning your circuit proposal for the master node:

- If the picaxe(08m) output is 3-stated (by making it an input), does this mean that both bipolar transistors are closed as well
</i>
When the serial output is tri-stated both bipolar transistors are fully ON and pull the gate terminals to within 100mV of their respective source terminals ie both mosfets are OFF. This circuit is a general purpose buffer for any other microcontroller tristate I/O.

<i>Another problem might still be that the CE voltage drop over the bipolars is too large to give a sufficient HIGH gate level to completely open the mosfets ... </i>

Consider the buffer as a &quot;break before make&quot; circuit. Both mosfets are off during tristate but also during switching so that both mosfets can never be on at the same time. The voltage swing on each gate is to within 100mV of both supply rails.


<i>A practical tip for testing: if on the master node a LED in series with the pull-up resistor is placed </i>

use a seperate resistor in series with the LED placed in parallel with the pull up resistor to guarantee logic 1 levels.

Edited by - on 23/10/2006 02:51:45

Sorry but the above anonymous post is mine.

wilf

Hello,

I have now included in the documentation (section 6.2) a description of the master node circuit with more commonly available types of inverting mosfet drivers (max626, mc33151, tc1426, tc426) by including the previously discussed NAND logic circuit.

@hippy:
I do think that the L293D motor driver could be used to replace BOTH the mosfet driver as well as the mosfets themselves (since the L293D has an enable pin that allows the outputs to be 3-stated). An issue though is the quiescent current of this chip: 20-60mA which is much higher that the mosfet line drivers (2-5mA), probably ruling out the use of batteries.

My original test-circuit does consume less than 3mA ... Another pro is that the whole circuit can be fed from a single 5V Vcc line (for low-current applications like sensor reading etc)

Considering testing:
I would strongly recommend to build exactly the same two-node tested network as described in the document . If you lower the communication speed to 300 baud, use a 0.5 second time-interval between sending messages by the master node (instead of t_comms) and add the earlier mentioned led in series with the pull-up resistor, you get a very clear view of what is happening:
* messages can now be &quot;seen&quot; (flickering led) and the difference between master and master-slave messages becomes more clear
*It is now also very clear that during message processing the slave node does not read the switch ...

Best regards,
Jurjen
http://www.kranenborg.org/ee/picaxe

Thanks Jurjen!

I have prototyped your Serial Power network hardware and software and it works very well.

<i>Considering testing:

I would strongly recommend to build exactly the same two-node tested network as described in the document. </i>

Ermm .... to simplify the design, I modified the 08M master / 08M slave circuits shown here:

<A href='http://www.user.dccnet.com/wrigter/serialpowermasterslave3.gif' Target=_Blank>External Web Link</a>

Note the different pins used for the Serin and Serout functions were changed for various reasons:

1) The modified driver for the master output bridge requires a bidirectional serout pin (PIN4).

2) Master PIN2 will be used with TUNES with a speaker.

3) SLAVE general purpose I/O pins were selected for versatility

4) Master/slave now have the same pin assignment:
PIN0 to PIN2 = general purpose I/O.
PIN3 = SERIN
PIN4 = SEROUT

Quoting the PICAXE MANUAL 2

<i>Information:
The serout command is used to transmit serial data from an output pin of the
microcontroller. It cannot be used with the serial download output pin - use the
sertxd command in this case. </i>

In the case of the 08M this information is evidently not correct. Nevertheless it seemed prudent to avoid using the serial download pin for serout.

The pushPullActive pin 2 was not required for the new tristate driver and is now available for general purpose I/O.

The symbols for pin functions in the master and slave network programs were changed as follows:
<i>
REM input &amp; output communications pin

SYMBOL netSerialIN = 3
SYMBOL netSerialOUT = 4
</i>

and interrupt definitions

<i>SYMBOL INTmask = %00001000 (master)
SYMBOL INTmaskENABLED = %00001000 (slave) </i>

In the master network program statements for tristating the serial power bridge replace:

HIGH pushPullActive with OUTPUT netSerialOUT
LOW pushPullActive with INPUT netSerialOUT

As HIGH, LOW and SEROUT statements automatically change PIN4 to OUTPUT direction, in some cases, the OUTPUT netSerialOUT statements can be completely deleted, to free up valuable program space.

Note that low power N-MOSFETs can be used for both master and slave active low line drivers. I have also succesfully used a 2N3904 with a 10K base resistor in place of the active low N-MOSFETs.

The 2SJ377 P-MOSFET is rated for 2A continuous. The P-MOSFET can be replaced with a PNP darlington and a 10K base resistor.

I would say this &quot;power over network&quot; concept is very versatile and I expect all kinds of variations on the theme, optimized for various application.

Speaking of which, my application for this is a networked PICAXE PLC for controlling some pretty high voltages and currents.

I will post some pics when it's tidied up.

wilf

Edited by - wilf_nv on 29/10/2006 02:24:06

Edited by - wilf_nv on 29/10/2006 02:25:19

Edited by - wilf_nv on 29/10/2006 02:27:13

Edited by - wilf_nv on 29/10/2006 05:55:51

Hello,

Thanks for testing; this is really needed as a proof of concept!

Your circuit looks indeed a major simplification, and I will come to include it as a variant in section 6.2 for a 08M master node. You seem much more experienced in hardware issues than I am; what do you think of my latest proposal circuit when an 18X is used in the master node: could it be simplified further also?

I am also very interested in details about application circuits, as a lot can be learnt from that as well.

Regards,
Jurjen

Here is a small PCB layout for the Power Serial Network that can be used for both 08M master and and 08M slave nodes by populating the PCB with slightly different parts.

<A href='http://www.user.dccnet.com/wrigter/serialpower08masterslavelayout.gif' Target=_Blank>External Web Link</a>

MASTER NODE

The master node uses all the parts shown although the termination resistors for the I/O are optional.

Power is connected to the master via J2.

If the external power supply for the master is unregulated 9V, install U2 and C2 to provide 5V/1A.

For current above 200mA use a heatsink on U2.

If the external supply is regulated 5V, leave off regulator U2, C2 and jumper pads 1 and 3.

The master normally supplies power to and communicates with the network slaves via a two wire network cable connected to J1.

Connector J3 can be used to connect the 08M OUT1, I/O2 and I/O3 pins to external devices (switches, LEDs).

A serial cabble can be connected to J4 for programming the 08M or for transmitting serial data to an external device (PC, Serial LCD, remote/wireless node).

SLAVE NODE

The slave nodes receive power from and communicates with the network master via a two wire network cable connected to J1.

Slave nodes normaly do not require a number of components shown in the layout including
U2,C2, Q1-3,R2-3 and R4 is replaced with a Schottky diode D1.

In addition, the slave line driver (BS170) is connected by installing a jumper between pads Q1-B and Q4-G. If the 2N3904 is to be used as the line driver, install Q1 only and jumper Q1-C to Q4-D.

If a slave uses a local external power supply or if the network uses a 3 wire cable to distribute power, then D1 is left off and power is obtained from J2.

If the external slave power supply is unregulated 9V, install U2 and C2 to provide regulated 5V/1A. If the external supply is regulated 5V, leave off U2, C2 and jumper pads U1-IN to U1-OUT.

A prototype area is included which can be used to customize the board with a small auxilary circuit (h-bridge, I/O expansion)

Note R6-9 are series resistors designed to limit input/output current for the I/O pins.
Values depend on the application but R6 for the download connections R6 is usually 100 ohms and R9 is 22K. Resistor network RP1 can be 10K -100K and the pads can be used with SIPS of various length.

The form factor of the board and mounting holes is the same as some prototype boards I have so that these can be stacked several high for more complex applications.

wilf

Added the PCB in gif format for iron on type transfer method.

<A href='http://www.user.dccnet.com/wrigter/serialpower08masterslavepcb.gif' Target=_Blank>External Web Link</a>

Note that both the 08M layout and PCB drawings were slightly revised for dimensions to conform to the Radio Shack 276-149 prototype board mounting holes.

The schematic showing the corrected part numbers based on the common master / slave PCB layout is here:

<A href='http://www.user.dccnet.com/wrigter/serialpower08masterslave.gif' Target=_Blank>External Web Link</a>

The 2 jumper connections in the slave circuit were previously described.

Keep in mind that the 7805 regulator and components shown connected to the I/O pins are optional depending on the application.

After this initial effort to get my project under way, I will build and test the high voltage control PLC and report back with the results.

wilf