12x 2 Input NAND Gates

oracacle

Senior Member
I am musing about a new timer based on the one I have already built (which is based on work done by hippy). as a prototype it work as well as anticipated.
The new timer will actually be 2 timers, each can be use as single input or 2 input, or inputs linked. Now the original project allows for each input to be inverted, which then runs through and SR latch, then through an Xor gate, clock signal added and finally that need to be inverted too.

As you can imagine that takes a fair amount of 2 input NAND gates, 12 for each timer, 24 total.
I can't seem to find packages containing more than 4 2 input NAND gates. Do they exist or am either better off (due to cost or some other reason) just using 3 quad NAND date packages. I know its not strictly PICAXE but the final project will be using at least 2 20X2. And this will be used for testing another PICAXE idea I have for updating some of my home made camera equipment

Thanks for any ideas.
 

hippy

Technical Support
Staff member
I don't think you'll find anything bigger than quad NAND. You could use a PICAXE programmed to act as logic gates. A simple NAND gate ...

outpinC.3 = pinC.1 & pinC.2 ^ 1
 

oracacle

Senior Member
Yes I could, but pulses sent into the timer could theoretically be very should which maybe missed by the picaxe.
I will just have to use 3 ICs

Thanks for the info.
 

AllyCat

Senior Member
Hi,

The new timer will actually be 2 timers, each can be use as single input or 2 input, or inputs linked. Now the original project allows for each input to be inverted, which then runs through and SR latch, then through an Xor gate, clock signal added and finally that need to be inverted too...... the final project will be using at least 2 20X2.
A (schematic) logic diagram would be helpful, including an indication of where the control signals originate (from PICaxe pins?). There are other logic functions available than just NANDs.

But it's quite possible that the PICaxe(s) already contain(s) enough "spare" gates and latches. For example, there is the "Data Signal Modulator", the "Timer1 Gate", the Pin Interrupt Latches and the two Comparators, etc..

Cheers, Alan.
 

oracacle

Senior Member
It will be essentially 2 of the timers a posted a link 2 earlier.
as for signal source, could be just about anything. In the video I use a switch as one input (and to activate the camera) and a photodiode to detect a camera flash and measure the time between the 2.

the original circuit made use of 8 NAND Gates and 4 or gates as that is what I had in my parts bin at the time.
Though having now slept on it, the circuit (that only exists in my head at this point) could go through some changes. The NAND XOR gate between the latches and clock adder can be changed for and XOR package (only 2 XOR needed other than the SR latches) the rest still needs to be there.

I know its a little unusual to see so much discrete logic these days but there is very little else that can deal with the short signal length that is so very cheap

3 of the NAND gates are setup as inverters, one of which only needed as a single gate is used as to add the clock signal into the system.
I am sure there was a reason why I made the SR latches from or gate on the original, and not NANDs. So that needs to be checked. Maybe something to do with active high and low input signals.
The point of asking the question was more about trying to thrash out ideas and work out how the circuit will finally function
 
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AllyCat

Senior Member
Hi,

Just a few random thoughts on the circuit diagram:

The two pushbuttons at top left appear to connect the supply rail directly to the input sockets (which also have an earth connection). I'd be inclined to include a resistor (even if only a few ohms) or a fuse to reduce the risk of "accidents".

The two input gates are used only as inverters, so could be 1/6 of an "04" (if using a changeover/two-pole switch), or 1/4 of an XOR gate and then a single-pole/way switch is sufficient.

You might avoid the "programming" switch by using the switch inside the 3.5 mm jack socket. The two gates on the input pin appear to be "enabled" by C.5. Why not just use the internal software to "ignore" or block the pulses on the input (instead of driving C.5)?

But much of this might be avoided by using the Timer 1 Gate hardware (T1G input can be on Leg 3 or Leg 4). That includes selectable polarity and latch/flip-flops, all under the control of one SFR:

Timer1GateControlReg.pngTimer1GateControlN.png

Your diagram appears to show that either the Red or the Green LED is illuminated by the state of the external "Latch". That could probably be achieved by driving from one PICaxe pin, by connecting one LED to the supply rail and the other to ground. If required, any input pin can be "Latched" by using the method described by hippy in post #3 of this thread.

Cheers, Alan.
 

oracacle

Senior Member
C.5 is the clock signal, C.4 is SR latch reset.
C.5 is set to a PWM, this is fed into the NAND which will only give the output when just one of the SR latches are activated - this is the function of the Xor gate in the middle(made from 4 NAND gates).
The input actually use a DPDT switch to change over from inverted to non inverted input (ie you can choose between a low going signal or a high going signal).
The red LEDs indicate that each latch is not active, green showing that the latches have been activated. The yellow LED shows that timing is in progress (there is a switch/input just recently added between +v and the LED - this means pulse length can be measures if desired).

Each time I stop and have a bit of think about it ideas change. If there is going to be 4 input, then a simple quad inverter can be used for the inverted input option, a 2 gates of a quad Xor can be used instead of making them up from NANDs, a quad NAND can be used for the clock adding and final conditioning section which would leave just the SR latches unchanged.
I did plan on using the switch in the stereo jack, the new design although based on the previous is not going to be an exact match. Thing like resistors on the push buttons are going to be added, and an addition switch to be able to separate the external and internal power if needed.

a excerpt of hippy's base code that maybe relevant.

Code:
[color=Green]' *****************************************************************
' * CIRCUIT DIAGRAM                                               *
' *****************************************************************

'           .----------------------------------------------.
'           |                                              |
'     .-.   |                           .-----_-----.      |
'  TX |O|---'          ___             -| +V     0V |-     |
'  RX |O|-------.-----|___|-----.-------| SI     SO |------'
'  0V |O|---.   |      22K      |      -| C.7   B.0 |------.
'     `-'   |   |               |      -| C.6   B.1 |-    .|.
'           |  .|.              |  .----| C.5   B.2 |-    | |  
'           |  | |         _| O-'  |   -| C.4   B.3 |-    | | 330R
'           |  | | 10K    |_|      |   -| C.3   B.4 |-    |_| 
'           |  |_|          | O----'   -| C.2   B.5 |-    _|_
'           |   |                      -| C.1   B.6 |-   _\./_ LED
'           |   |        Push          -| C.0   B.7 |-     |
'       0V _|___|_      Button          `-----------'     _|_ 0V
'
'
' Note that to use this configuration "#Define GENERATE_CLOCK" must
' be specified in the configuration section above.[/color]
I don't currently claim to completely understand the base code, dyslexia get in the way while trying to get through the data sheet. Hippys' code does appear to use timer 1 already though

Edit: Which data sheet is that info taken from. as far as I can tell from the PIC18(L)F1Xk22 data sheet - as far as I can tell that is the base PIC for the 20x2. The reference to timer1 in my copy is different to that which you posted.
 
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