Understanding Picaxe Memory map Ver9a.pdf

Protezoid

New Member
Hello, i have a bit of difficulty understanding the mega memory map document '' Variable Map Ver9a.pdf '' for the RAM section with SFR.
The info does not pop out clearly. I have used bptr, poke, peek and understand these commands. Normally i experiment and research a lot before asking help but there are warnings not to mess with SFR's and risk frying Picaxes so i need some guidance and forum wisdom please!

Here is what i don't understand:

For example, in PE, the 08m2 has user ram 0-127, including variables b0-b27. The map Ver9a.pdf shows something different from 0 to 255 with SFR sections, comments like:

'' For M2 parts bptr/@bptr can access > address 255''
'' User RAM ( $50-$7F, $C0-$FF ) ''
" M2 parts can access 0 to 511 "

Is there 2 different banks for RAM ( Bank 0 & 1), or just one? For 08m2, PE displays a continuous section of free user RAM (0-127) but in reality these RAM addresses are just a representation of fragmented free sections put together from bigger RAM(S)? So i can't access SFR's with bptr and there is no danger of messing up these registers right?

So if i want to write 0xFF in ram 127 with bptr, i would say:
bptr = 127
@bptr = 0xFF

The same command with poke in relation to the mega map document would be what?
Where is free user RAM address 127 that PE will use in that map?

What about variable b27, where is it's RAM address?

Why it is written '' M2 parts can access 0 to 511 '' when the RAM map show 0-255 ?
The 14m2 has 512 byte of RAM, where is it in this map? Ther are two RAM of 0-255?

Is there an extra Picaxe manual or document on SFRs besides this mega map?
Something that would show individual memory map instead of one collective.

Picaxe is so cool and clear when making code but this makes me feel like hitting my head with a Nerf bat because i really don't get this!

Thanks in advance for help

André
from Montreal
 

westaust55

Moderator
Thank you for highlighting the problem in my memory map Ver 9a.

Firstly, yes you are correct and the Memory Map Ver9a does have an error/omission with respect to the 08M2 parts for RAM accessible with the PEEK and POKE commands.

Considering the lines of text at the top of the memory table for BASIC ACCESSIBLE RAM:
BASIC ASSESSIBLE RAM / SPECIAL FUNCTION REGISTERS (SFR's)
- Commands: POKE & PEEK TO ACCESS SFR's & RAM
See Separate tables for the SFR addressing/functions for the M2 and X2 parts (Commands: POKESRF & PEEKSFR)

For M2 and X2 parts also bptr and @bptr functions for access to RAM. For M2 parts bptr/@bptr can access > address 255
20X2 can access RAM locations 0 -127; 28X2 and 40X2 parts can access 0-255; and M2 parts can access 0 to 511
The statement: For M2 parts bptr/@bptr can access > address 255
should exclude the 08M2 which is limited to an upper memory location of 127 ($7F) as stated in PICAXE Manual 2 on Page 14.
Thank you for highlighting the problem in my memory map Ver 9a.

Regarding the note 3 below the table:
3) User RAM ( $50-$7F, $C0-$FF )
Is unshaded and thus is meant to represent a memory range that all PICAXE parts can access. Unless there is light green shading and notes for exclusions down the right hand side of the memory list columns.
However, keep in mind the statement above those 7 notes:
Banks 0 & 1 RAM or Special Function Registers (for 08, 08M, 14M, 18X, 20M, 28X1 & 40X1)
which specifically excludes the M2 and X2 parts, where the notes at the top of the table alone are meant to be considered.

I will endeavor to have the memory map updated soon (native files are only available to me when I am home) to correctly reflect the 08M2 memory availability.
 

AllyCat

Senior Member
Hi,

there are warnings not to mess with SFR's and risk frying Picaxes so i need some guidance and forum wisdom please!

Is there an extra Picaxe manual or document on SFRs besides this mega map?
AFAIK there is nothing you can write in a program that will "fry" the PICaxe. Peeking or Poking to some SFR adresses does (intentionally) cause an instant Reset, so if you are experimenting with SFRs it's always worth putting a SERTXD("Started") at the top of your program to report (on the Editor Terminal) that a Reset has happened.

Where the (on-line) documentation doesn't give all the information that you need, then often the easiest method is to try it in the Program Editor (for the specific PICaxe chip). It it finds an error, it will often explain the limitation. Also try the simulator, but that doesn't support all commands, particularly some Hardware features such as the SFRs.

The full set of SFRs is very complex and the only reference is the appropriate base PIC data sheet, which is linked in the Advanced Technical Details here.

Cheers, Alan.
 

Protezoid

New Member
Thank you Westaust for that map btw!
Yes it is very complex to read at first and must be even more complex to make.
It would be nice to have individual maps for the same family Picaxe parts like M2, X2 etc

If i change an input into output on a Picaxe pin or port by mistake by changing values in a SFRs, will the Picaxe reset or damage itself from short circuit pins that become outputs? So if the Picaxe resets, there are no dangers of frying pins and other ICs on connected to it?

Thanks for the info!
André
 

hippy

Technical Support
Staff member
If i change an input into output on a Picaxe pin or port by mistake by changing values in a SFRs, will the Picaxe reset or damage itself from short circuit pins that become outputs?
Both are potentially possible. It would be recommended to include current limiting resistors on pins which are inputs but could accidentally be made outputs to mitigate short-circuit damage.
 

westaust55

Moderator
It should also be noted that changing a pin from being an input to being an output would occur should you change a bit in a TRIS SFR.
This is no different to using the DIRSx command or the OUTPut command or even the HIGH or LOW commands.
Thus the suggestion by hippy to include a Series resistor (as an insurance policy) is not limited to times when poking to SFR.
 

AllyCat

Senior Member
Hi,

If it's possible to "fry" a PICaxe with an incorrect command (of any type) then that is basically a hardware design fault. It's easy enough to incorrectly use a LOW pin command, you don't need to delve into POKESFR commands ! You'll probably get away with directly linking two I/O pins, but connecting an I/O pin directly to ground is risky and you should never connect it directly to the supply rail (or through a resistance of less than 100 ohms), even if via a pushbutton switch.

The port.pin SFRs on most M2s are particularly complicated, because some of the I/O pins are "remapped". With an 08M2, the pin numbers are correct, but they are on SFR Port A, even though PICaxe Basic calls it Port C (or B). A 14M2 uses SFR Ports A and C whilst the Editor calls them C and B (using different numbers) and a 20M2 uses SFR Ports A, B and C, whilst the editor uses Ports B and C, again with different pin numbers (except for A.0).

But there is one advantage with the SFRs, that the SFR Port.pin numbers are fully compatible between the 08, 14 and 20 (not 18) pin device legs. The 20M2 editor uses a port.pin numbering scheme different to all the other M2 packages.

Cheers, Alan.
 
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westaust55

Moderator
Further to my comment at Post 2 where i indicated that I will endeavor to have the memory map updated soon

Unfortunately, I have not been able to locate the native (Excel) table for the memory map Version 9a (I only had the pdf copy saved :mad: ).
I do have the native for Version 8 but there are quite a few changes to get back to memory map V9a so unfortunately that update may not happen so rapidly.
 
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