How do i create 8 frequency dividers running all at once?

Hi All,

I have a tricky one, i think ;-)

I want to monitor some 8bit data on a somewhat fast Data bus, cycling at several 100's of KHz...

Currently, i run each data pin thru a seperate 4040 binary counter and use the last output (divide by 4096) to feed into another 4040 counter....

Somewhere around the 'divide by 128,000 and lower is where i can see my LEDs counting in a slow (viewable) rate.
I've since replaced the leds with 7seg displays to see Hex data that i needed to confirm....

Obviously the data viewed isn't realtime, it is perhaps in the order of several SECONDS due to the large binary counter division, but the timing isn't a problem, it's the confirmation of the data content that is important.


So far the concept is all well & good, but it currently takes around 20 cmos chips to do it....


So, I would like to move this monitor into a picaxe, i figure i'd use 1 full (8bit) port as the data inputs, then some internal division/delay, then send it out another full port to external 7segs etc.

Any ideas of the best methods to do the frequency division?

At this stage, i don't even mind using 8 of the 8M chips, 1 dedicated to each bit....

Maybe tricky? maybe easy?i'm stumped at the moment... ;-)

Regards,
Marty.

Hi Marty,

I'm completley at a loss to see what you are learning by watching 8 changing bits, each of which is 'viewed' after it's been divided by a humungous number.

Please tell us a bit more as to what it is you need to see about these 8 bits.
Is it just the frequency of each bit that you need to know, or does the timing relationship between bits matter ?

Cheers,

Buzby

If you take a signal at 1MHz into a PICAXE on-board counter that can act as a divide by 216 with the PICAXE seeing an overflow at ~15Hz rates. It should then be possible to divide those in software with 65ms to handle each overflow.

It seems a 20X2 could implement a divide by up to 219 purely in hardware. 217 would probably be that '128,000' division you already have.

You might have to trawl through the Microchip datasheets to find which PICAXE could do that, would support high speed clocking, but should be possible.

Hi Marty,

I can't see how you could count pulses on a full 8-bit wide port at even 1 kHz using a PICaxe.

Probably the (only) PICaxe solution would be one 08M2 for each bit. An internal hardware counter (probably Counter/Timer1) can count pulses on a single pin and then polling PICaxe code (or perhaps an interrupt) updates a software counter (program variable) each time that the hardware counter overflows. The program can then drive any output pins as required.

Note that Timer1 is used by the PICaxe Operating System which you may need to "work around".

Cheers, Alan.

AllyCat said:

... I can't see how you could count pulses on a full 8-bit wide port at even 1 kHz using a PICaxe. ...

Click to expand...

I did something similar, reading a port and processing the results, at 1kHz quite simply on a 20X2, but it will definately struggle at higher speeds.

Buzby said:

Hi Marty,
I'm completley at a loss to see what you are learning by watching 8 changing bits, each of which is 'viewed' after it's been divided by a humungous number.
Please tell us a bit more as to what it is you need to see about these 8 bits.
Is it just the frequency of each bit that you need to know, or does the timing relationship between bits matter ?
Cheers,
Buzby

Click to expand...

I'm trying to monitor corrupt data and/or data "changes" during different operations of old 8bit equipment.
In fact the bigger picture would also be to monitor the 16bit address bus to ensure the data is occuring correctly at adresss xx etc.

I figured a mega-divider/data displayer would be a handy tool for this purpose.

I've also come to realise my initial design (which began some years ago, and i just decided to pick it up recently) was actually monitoring the address bus, as the binary code would always be advancing at each clock cycle, however, monitoring the data might have the same data (e.g. FF) at a few locations and therefore couldn't be used to 'clock' my 4040 counters.....i'd need something more like a shift registor where a seperate clock/data signal would be used.

sigh..... ;-)

It isn't clear what you expect to _see_ ? Dividing data (or address) bus is just going to produce twinkly lights; nice to confirm activity but with little relation to data. How are you expecting to see corruption? One byte of data is much like another, you can only tell its corrupt if you know what its supposed to be. If you have divided 1023 bytes of data to produce one light pattern, you've no idea where the corruption occured and could not tell if there had been two corruptions. Is there some corruption-detected signal (like a parity check) that you can use to trap the offending data?

I expect to see a certain pattern of bytes, once that's established i then expect to see WHICH of the bytes is changing when a certain function is performed (a switch pressed etc).

The address bus would also be decoded/delayed in synch with the data being detected, so, if $FFFF does (or doesn't) contain $3F, then i'll know about it.

I did say in 1st post that "leds on pins are now 7seg displays".....there's no mistakes or need to watch "twinkling lights"


I think a few people are going a bit beyond the scope of the question, and in fact the use & function is irrelevant, all i was trying to achieve was to eliminate 20 Cmos IC's down to something neater like 1 pic or 8 small pics (1 for each bit), ALL as i mentioned in earlier posts....

I figured there might have been a few easy math commands, dividers, or internal frequency divider/scalers i could use in the picaxe, i just wasnt exactly how to use them and asked for assistance.
If this is impossible, then i'll turn my ICs into CPLD instead, i just figured there might be an easy picaxe solution...maybe not.

Hi Marty,

I think you need a logic analyser, maybe one like the Salea ( or whatever its called ).
A decent analyser will let you set up target patterns , on either the address or data bus, then archive the data before/after the pattern match.
My antique Tektronix can do it, so I imagine a modern, even PC based, analyser will do much more than mine.

Building one from CMOS and PICAXE is not the way to do it !.

Cheers,

Buzby

Hi Buz,

Funny thing is i have a USB Logic analyser to do that exact job, but i was trying to build a handy (non PC) item with an easy to see 7seg display etc.

It would also be a project that i (intended) to offer to certain electronics/computer tinkerers on other forums as a kit etc.

Marty.

Hi Marty,

It's an interesting idea, and it's easy logic to understand. The downside is it will need lots of chips ( as I think you are already finding out ).
A simple version, where you monitor a single selected address, would take very little hardware.
Between these two extremes there are lots of options.
For instance, you could use a PICAXE to pre-load RAM which can then decode the specified address ranges from the bus.

It would be much easier to come up with a viable solution if you explained a bit more as to what the busses are doing, and exactly what you need to see.

Cheers,

Buzby