'switch pwm output between c.2 and c.0 using dsm
'carrier is pwm (ccp1), modulator is mdbit for software control
'pot on C.4 (leg 3)
'switch on c.3(leg 4)
#picaxe 08m2
#no_data
symbol adResult = w2
low c.2 'initial state of pwm pin
low c.0 'initial state of mdout alternate pwm pin
;===========================================
'set up the DSM
PokeSfr $FC, %11000001 ; SFR $39C MDCON (mixer turned on and output of mixer on MDOUT , leg 7 enabled)
'MDCON: MODULATION CONTROL REGISTER
'bit 7 MDEN: Modulator Module Enable bit
' 1 = Modulator module is enabled and mixing input signals
' 0 = Modulator module is disabled and has no output
'bit 6 MDOE: Modulator Module Pin Output Enable bit
' 1 = Modulator pin output enabled
' 0 = Modulator pin output disabled
'bit 5 MDSLR: MDOUT Pin Slew Rate Limiting bit
' 1 = MDOUT pin slew rate limiting enabled
' 0 = MDOUT pin slew rate limiting disabled
'bit 4 MDOPOL: Modulator Output Polarity Select bit
' 1 = Modulator output signal is inverted
' 0 = Modulator output signal is not inverted
'bit 3 MDOUT: Modulator Output bit
' Displays the current output value of the Modulator module.(1)
'bit 2-1 Unimplemented: Read as ‘0’
'bit 0 MDBIT: Allows software to manually set modulation source input to module(1)
' 1 = Modulator uses High Carrier source
' 0 = Modulator uses Low Carrier source
PokeSfr $FD, %00000000 ; SFR $39D MDSRC
' modulator source is MDBIT , software control
'MDSRC: MODULATION SOURCE CONTROL REGISTER
'bit 7 MDMSODIS: Modulation Source Output Disable bit
' 1 = Output signal driving the peripheral output pin (selected by MDMS<3:0>) is disabled
' 0 = Output signal driving the peripheral output pin (selected by MDMS<3:0>) is enabled
'bit 6-4 Unimplemented: Read as ‘0’
'bit 3-0 MDMS<3:0> Modulation Source Selection bits
' 1111 = Reserved. No channel connected.
' 1110 = Reserved. No channel connected.
' 1101 = Reserved. No channel connected.
' 1100 = Reserved. No channel connected.
' 1011 = Reserved. No channel connected.
' 1010 = EUSART TX output.
' 1001 = Reserved. No channel connected.
' 1000 = MSSP1 SDO output
' 0111 = Reserved. No channel connected.
' 0110 = Comparator 1 output
' 0101 = Reserved. No channel connected.
' 0100 = Reserved. No channel connected.
' 0011 = Reserved. No channel connected.
' 0010 = CCP1 output (PWM Output mode only)
' 0001 = MDMIN port pin
' 0000 = MDBIT bit of MDCON register is modulation source
PokeSfr $FE, %00000000 ; SFR $39E MDCARL
'when the modulating signal is low the output on MDOUT will be 0
'MDCARL: MODULATION LOW CARRIER CONTROL REGISTER
'bit 7 MDCLODIS: Modulator Low Carrier Output Disable bit
' 1 = Output signal driving the peripheral output pin (selected by MDCL<3:0> of the MDCARL register)
' is disabled
' 0 = Output signal driving the peripheral output pin (selected by MDCL<3:0> of the MDCARL register)
' is enabled
'bit 6 MDCLPOL: Modulator Low Carrier Polarity Select bit
' 1 = Selected low carrier signal is inverted
' 0 = Selected low carrier signal is not inverted
'bit 5 MDCLSYNC: Modulator Low Carrier Synchronization Enable bit
' 1 = Modulator waits for a falling edge on the low time carrier signal before allowing a switch to the high
' time carrier
' 0 = Modulator Output is not synchronized to the low time carrier signal(1)
'bit 4 Unimplemented: Read as ‘0’
'bit 3-0 MDCL<3:0> Modulator Data High Carrier Selection bits (1)
' 1111 = Reserved. No channel connected.
'
' 0101 = Reserved. No channel connected.
' 0100 = CCP1 output (PWM Output mode only)
' 0011 = Reference Clock module signal
' 0010 = Reserved. No channel connected.
' 0001 = MDCIN1 port pin
' 0000 = VSS
PokeSfr $FF, %10000100 ; SFR $39F MDCARH
'when the modulating signal is high the output on MDOUT will be the CCP1 (pwm)
'the pwm signal will not drive the output pin (leg 5) so we can use it as an adc (hopefully)
'MDCARH: MODULATION HIGH CARRIER CONTROL REGISTER
'bit 7 MDCHODIS: Modulator High Carrier Output Disable bit
' 1 = Output signal driving the peripheral output pin (selected by MDCH<3:0>) is disabled
' 0 = Output signal driving the peripheral output pin (selected by MDCH<3:0>) is enabled
'bit 6 MDCHPOL: Modulator High Carrier Polarity Select bit
' 1 = Selected high carrier signal is inverted
' 0 = Selected high carrier signal is not inverted
'bit 5 MDCHSYNC: Modulator High Carrier Synchronization Enable bit
' 1 = Modulator waits for a falling edge on the high time carrier signal before allowing a switch to the
' low time carrier
' 0 = Modulator Output is not synchronized to the high time carrier signal(1)
'bit 4 Unimplemented: Read as ‘0’
'bit 3-0 MDCH<3:0> Modulator Data High Carrier Selection bits (1)
' 1111 = Reserved. No channel connected.
'
' 0101 = Reserved. No channel connected.
' 0100 = CCP1 output (PWM Output mode only)
' 0011 = Reference Clock module signal (CLKR)
' 0010 = MDCIN2 port pin
' 0001 = MDCIN1 port pin
' 0000 = VSS
;=============================================
pullup %00001000 'enable pullup on c.3
'turn on the pwm
pwmout pwmdiv4, 2, 249, 500 '1 kHz 50 %
pause 100
top:
if pinc.3 = 1 then 'put pwm on c.2 (leg 5)
PokeSfr $FC, %10000001 ; SFR $39C MDCON (output of mixer on MDOUT is disabled , leg 7)
PokeSfr $FF, %00000100 ; SFR $39F MDCARH (enable the pwm pin, leg 5)
else 'put pwm on c.0 (leg 7)
PokeSfr $FC, %11000001 ; SFR $39C MDCON (output of mixer on MDOUT is enabled , leg 7)
PokeSfr $FF, %10000100 ; SFR $39F MDCARH (disable the pwm pin, leg 5)
endif
readadc10 c.4,adResult
pwmduty c.2,adResult
pause 100
goto top
end