sr latch usage

I'm interested in using the SR latch on a 20M2. I can activate the SR latch using B.0 (pin 18, SRI) and use B.1 (pin 17, SRQ) as the latch output. Now I'd like to use the latch as a pseudo-interrupt when an external event triggers B.0, without using B.1 (SRQ) as an output, as it is needed for another purpose. Can the 20M2 read the latch status without using B.1 (SRQ)? Is there a variable name for the latch status?

No, the main pupose of the latch is that it can be software independent (once enabled) so it does not have associated registers remembering which state it is in - it is basically 'hard wired' controlled, not in software.

Naturally you can always connect SRQ back to an input, and then read that input. If SRQ not available use SRNQ instead (C.4) and invert in software.

I definitely can't spare another pin as an input. Worst case I connect a cap to srq, let it charge up and briefly check it occasionally as an input. But that's still 2 IOs (SRI &SRQ), so I'm better off using just one pin and adding an SCR.

Unfortunately, as Technical says, the SRQ / SRNQ signal lines from the SR latch can only go to output pins and there is no internal SFR which carries the state of the latch outputs which can be read. That seemed an odd decision to me but is indeed how the silicon has it.

This is also a case where even using the bad practice of reading an output pin as if it were an input pin does not work reliably if at all. I ran into the very same issue myself and had to use an extra input pin to read the SRQ output.

If you simply want to flag the passing of a short pulse it may be possible to use the 'interrupt on change' (IOC) capabilities of the ports. There's no HINTSETUP to aid on the M2 but could likely be achieved through accessing SFR's. That technique has I recall been used with the 08M and would seem to achieve what you you actually need.

You can either try it yourself or leave it with me and I'll try to get that working this evening.

Works for me. Detects rising ( positive going ) edges on B.0 (SRI) and latches those, change IOCAP to IOCAN to latch falling ( negative going ) edges. As can be seen, keeps working through SLEEP and therefore NAP and PAUSE.

@Hippy: Now THAT is a timely technical response. Thanks for your assistance, mate!