ADC Oddity

[frankeltham]

Has anyone had the following wierd thing happen with ADCs?

Circuit: (using an 18X).
All 3 ADCs connected to 'slow' inputs (measured voltage ranges 2 to 4Volts).
PSU is well regulated and smoothed.

Direct measurement using a DMM show the input voltages behaving as they ought to.

But something strange happens depending on the order of code: Example:-

READADC 2,fred
READADC 0,john
debug

The numbers fred and john are fine.
But if I reverse the first 2 lines to:

READADC 0,john
READADC 2,fred
debug

Then 'fred' comes out high.

However, if I insert another READADC:
READADC 0,john
READADC 1,Bill
READADC 2,fred
debug

or repeat a READADC:-
READADC 0,john
READADC 2,Fred
READADC 2,fred
debug
then fred is fine again.
Inserting pauses makes no difference, but the order appears to be.
Why is this?

(P.S. The inputs to the ADCs are electrically separate and there is no RAM conflict concerning variable names.)

Can someone explain (electrically) whats going wrong please?

[BeanieBots]

There are two possible causes for this.
Firstly, I suspect that you have a high source impedance. That is, whatever is connected to the ADC by way of voltage, is via a high resistance. The internals of the ADC uses a "sample & hold" mechanism. This results in a certain amount of capacitive coupling between inputs. This should not be an issue when the source has a low impedance.
The microchip data sheets states that the source should not be greater than 2k5. (practice indicates that 10k is about the highest you can get away with.)
Try adding a capacitor directly to the inputs. If the reading still increases, you also then see the increase on your meter. (it is too quick for your meter to respond without the cap).

In addition to the above, the negative current that comes in via the download cable upsets the ADC. Checkout the "enhanced download circuit". Basically, you need to prevent the negative current. You can do that by either clamping the serin input with a schottky to 0v or putting any regular diode in series between PC and 10k/22k junction.

[frankeltham]

Thanks BeanieBots for your quick reply.

The input sources are indeed high impedances. Probably nearer 1Mohm. I had (obviously incorrectly) assumed the ADC inputs would be a very high impedance with a proper sample-and-hold buffer.

Your post prompted me to read the 16F87/8 data sheet and I see your point. For others who may have experienced oddities, I quote from the ADC section:-
"The maximum recommended impedance for analog sources is 10 kΩ. This is required to meet the pin leakage specification."

And the graph shows an ADC sampling input Impedance of about 7K at Vdd=5V.

BeanieBotts has highlighted the nead-to-read.

So without unity-gain opamp buffering or similar, this makes twilight switching using LDRs not ideal, for example.

As a cheaper alternative your suggestion of a healthy capacitor to act as a 'reservoir' for the ADC sounds good. I'll try it. Though I would assume that this requires infrequent sampling to allow the cap to charge.

My measurements with my DMM were without the programme running so I couldn't see the effect of the ADC input impedance, which would have been to fast anyway. I may have a squiz with my 'scope attached just out of interest.

PC interface - I use the 'advanced' interface complete with schottky diode as a small plug-in (so my board just has a 3-way pin header) and I've got my code to peep at me to tell me what its doing. Still behaves similarly with/without I/F.

Thanks BB. I appreciate it. But, I still don't see why the 'order' of my code affects the results? Surely they would both 'err' regardless of which READADC command went first?

[hippy]

One way to visualise the sample and hold function of the A2D function is to think of it as a multi-meter that has a large capacitor across it's 0V/+V probes.

When you put the +V probe on one voltage source the capacitor goes to that voltage and you can read it off. If you've read a large voltage and then go and measure a lower voltage, the cap needs to have discharged to the source voltage for your reading to be accurate. The measuring isn't done by holding the probe on the source, but is a brief tap, and a brief tap on a lower voltage source may only partially discharge the cap so your reading would be high. Likewise, going from a low to high voltage may not fully charge the cap so a lower than actual reading is obtained.

The order in which source voltages are measured will affect how accurately the cap tracks what the voltages are, and of course depends upon what the voltages are; the cap will have moved accurately to the new voltage if close to the old. Taking multiple readings ( tapping on the same source ) allows the cap to become more correct.

Because the cap doesn't discharge much when not taking a voltage reading, putting delays between the readings won't affect the results much.

[Michael 2727]

If you are measuring voltage across a cap
try a high value resistor, 1Meg, 470k, as a
bleed resistor.

[frankeltham]

Thanks for the replies. I appreciate them.
Think we may have gone off at an angle here.

Re: the A2D based on the data sheet.
It seems that it counts how many sampling (switching) operations it requires to charge an internal capacitor (Chold)to get it up to the same voltage as a ref Voltage via 2 effective resistances (Ric and Rss in the diagram). This seems a very simple method that doesn't appear to require sample-and-hold.
(Check the data sheet ADC Analogue diagram).

Looking at the Data Sheet (well spotted BB) I can see why the source impedances I have are technically too high and will affect the conversion.

But back to the original plot...
Why does the order of the code affect the READADC result?
Inserting a 'superfluous' READADC has got it all working again i.e. resulting in the numbers I expect (hope for). Why? Dunno.

So, its sorted, but still doesn't seem logical. I'm going to have a twiddle with the circuit and see what pops up. Phase 1: reduce impedances...

[BeanieBots]

Hippy has explained very nicely. I would like to emphasise that putting a cap on the input is NOT a solution to the problem. It was suggested so that you could "see" the affect realtime with a meter. It might help reduce the effect but as you have already worked out, the only way to do it "properly" is to use a buffer if your source has a high impedance.
The effect can to some degree be factored in (calibrated out) but the result becomes code and device dependant. If you only use one input from an LDR or divider then there will be no issue compared to calibrating the LDR itself.
As with most analog designs, it is a balancing act between accuracy/cost and complexity. Does the required accuracy justify the cost and complexity of using op-amps etc?
The important thing is to understand the issue.
This does come up from time to time and I am glad you have raised it again because I think it one of those issues that is not fully appreciated.

Posts crossed:
To try to explain the affect better, the amount that the reading is affected is a function of the voltage on another input, the internal capacitance of each input (device dependant) and the voltage of the input you are reading for the very reasons you describe based on how the reading is made by the internal workings.
Hope that makes sense, it's clear in my head but the words don't come out too well.


Edited by - beaniebots on 1/21/2006 1:29:22 PM

[hippy]

<i>Re: the A2D based on the data sheet ... This seems a very simple method that doesn't appear to require sample-and-hold. (Check the data sheet ADC Analogue diagram). </i>

I think that is a mis-reading of the data sheet. Figure 12-2 shows the sample and hold and Section 12.1 describes the settling time needed to get the internal cap to the correct voltage. Note 2, &quot;charge holding capacitor (CHOLD) is not discharged after each conversion&quot;, indicates that it does simply track the input voltage whenever a connection to the source voltage is made.

As per 12.1, the official word rather than my multi-meter explanation; &quot;For the A/D converter to meet its specified accuracy, the charge holding capacitor (CHOLD) must be allowed to fully charge to the input channel voltage level. The source impedance (RS) and the internal sampling switch (RSS) impedance directly affect the time required to charge the capacitor CHOLD. After the analog input channel is selected (changed), this acquisition must be done before the conversion can be started&quot;.

The PICAXE doesn't allow user control of acquisition time, it's set by Firmware, but multiple readings perform repeated acquisitiosn on the same source, so it is akin to extending it.

[Edit : Now corrected as per bgrabowski's comment below - Thanks ... ]

As an aside, I looked up the wrong data sheet first, the PICAXE-18A (16F819) has a recommended source impedance of 2K5, the 18X (16F88) is 10K.

Edited by - hippy on 1/21/2006 11:33:56 PM

[frankeltham]

Aha. Glad to see you spotted my deliberate mistake. Yes, I see what you mean re: ADC. Also if I'd read a bit further Fig 12.3 clarifies it. ('Mis-read' in my case was 'not-read'!!)
Right that's the ADC sorted out - so its just the other bit now. Soldering iron and oscilliscope on standby...

[bgrabowski]

Hippy, you have the numbers for the 18X and 18A the wrong way round.

Now corrected I see.

Edited by - bgrabowski on 1/22/2006 7:43:42 AM

[frankeltham]

The Bodger Has Landed!
Putting a scope on the ADC pin and increasing the source resistance showed up the ADC switching effect.
Sticking a 1uF tant cap across as a 'reservoir' seems to allow the ADC input to take what it needs (as it is so brief - get your scope out and try it). A BeanieBot idea.
No, I'm not claiming a perfect answer as it isn't. So please don't moan.
But it does give your simple LDR/Res divider circuit much more range at the darker levels, where your LDR will be over 1MegOhm.
This is good enough for a cheap and cheerful setup - not for a precision setup.
(and only infrequent sampling for obvious reasons).
So for a cheap twilight switch its fine. For a light meter , well..... perhaps not.
And now me code works properly too.

And it takes b-all current and cost b-all pence. (less than 1 uamp dark.)

The clouds of confusion are lifting and thank you all for the help and suggestions.